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ports.h

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00001 
00011 /* Generated for the BeeOS project 2004/03 by Paul Harvey,
00012  * csirac@users.sourceforge.net.
00013  */
00014 
00015 #define PORTA   (*(volatile unsigned char *)0x0000) /* Bit7 6   5   4   3   2   1   0 */
00016 #define PORTB   (*(volatile unsigned char *)0x0001) /* Bit7 6   5   4   3   2   1   0 */
00017 #define DDRA    (*(volatile unsigned char *)0x0002) /* Bit7 6   5   4   3   2   1   0 */
00018 #define DDRB    (*(volatile unsigned char *)0x0003) /* Bit7 6   5   4   3   2   1   0 */
00019 /* Reserved: 0x0004. */
00020 /* Reserved: 0x0005. */
00021 /* Reserved: 0x0006. */
00022 /* Reserved: 0x0007. */
00023 #define PORTE   (*(volatile unsigned char *)0x0008) /* Bit7 6   5   4   3   2   1   0 */
00024 #define DDRE    (*(volatile unsigned char *)0x0009) /* Bit7 6   5   4   3   2   0   0 */
00025 #define PEAR    (*(volatile unsigned char *)0x000A) /* NOACCE   0   PIPOE   NECLK   LSTRE   RDWE    0   0 */
00026 #define MODE    (*(volatile unsigned char *)0x000B) /* MODC MODB    MODA    0   IVIS    0   EMK EME */
00027 #define PUCR    (*(volatile unsigned char *)0x000C) /* PUPKE    0   0   PUPEE   0   0   PUPBE   PUPAE */
00028 #define RDRIV   (*(volatile unsigned char *)0x000D) /* RDPK 0   0   RDPE    0   0   RDPB    RDPA */
00029 #define EBICTL  (*(volatile unsigned char *)0x000E) /* 0    0   0   0   0   0   0   ESTR */
00030 /* Reserved: 0x000F. */
00031 #define INITRM  (*(volatile unsigned char *)0x0010) /* RAM15    RAM14   RAM13   RAM12   RAM11   0   0   RAMHAL */
00032 #define INITRG  (*(volatile unsigned char *)0x0011) /* 0    REG14   REG13   REG12   REG11   0   0   0 */
00033 #define INITEE  (*(volatile unsigned char *)0x0012) /* EE15 EE14    EE13    EE12    0   0   0   EEON */
00034 #define MISC    (*(volatile unsigned char *)0x0013) /* 0    0   0   0   EXSTR1  EXSTR0  ROMHM   ROMON */
00035 #define MTST0   (*(volatile unsigned char *)0x0014) /* Bit7 6   5   4   3   2   1   0 */
00036 #define ITCR    (*(volatile unsigned char *)0x0015) /* 0    0   0   WRINT   ADR3    ADR2    ADR1    ADR0 */
00037 #define ITEST   (*(volatile unsigned char *)0x0016) /* INTE INTC    INTA    INT8    INT6    INT4    INT2    INT0 */
00038 #define MTST1   (*(volatile unsigned char *)0x0017) /* Bit7 6   5   4   3   2   1   0 */
00039 /* Reserved: 0x0018. */
00040 /* Reserved: 0x0019. */
00041 #define PARTIDH (*(volatile unsigned char *)0x001A) /* ID15 ID14    ID13    ID12    ID11    ID10    ID9 ID8 */
00042 #define PARTIDL (*(volatile unsigned char *)0x001B) /* ID7  ID6 ID5 ID4 ID3 ID2 ID1 ID0 */
00043 #define MEMSIZ0 (*(volatile unsigned char *)0x001C) /* reg_sw0  0   eep_sw1 eep_sw0 0   ram_sw2 ram_sw1 ram_sw0 */
00044 #define MEMSIZ1 (*(volatile unsigned char *)0x001D) /* rom_sw1  rom_sw0 0   0   0   0   pag_sw1 pag_sw0 */
00045 #define INTCR   (*(volatile unsigned char *)0x001E) /* IRQE IRQEN   0   0   0   0   0   0 */
00046 #define HPRIO   (*(volatile unsigned char *)0x001F) /* PSEL7    PSEL6   PSEL5   PSEL4   PSEL3   PSEL2   PSEL1   0 */
00047 /* Reserved: 0x0020. */
00048 /* Reserved: 0x0021. */
00049 /* Reserved: 0x0022. */
00050 /* Reserved: 0x0023. */
00051 /* Reserved: 0x0024. */
00052 /* Reserved: 0x0025. */
00053 /* Reserved: 0x0026. */
00054 /* Reserved: 0x0027. */
00055 #define BKPCT0  (*(volatile unsigned char *)0x0028) /* BKEN BKFULL  BKBDM   BKTAG   0   0   0   0 */
00056 #define BKPCT1  (*(volatile unsigned char *)0x0029) /* BK0MBH   BK0MBL  BK1MBH  BK1MBL  BK0RWE  BK0RW   BK1RWE  BK1RW */
00057 #define BKP0X   (*(volatile unsigned char *)0x002A) /* 0    0   BK0V5   BK0V4   BK0V3   BK0V2   BK0V1   BK0V0 */
00058 #define BKP0H   (*(volatile unsigned char *)0x002B) /* Bit15    14  13  12  11  10  9   8 */
00059 #define BKP0L   (*(volatile unsigned char *)0x002C) /* Bit7 6   5   4   3   2   1   0 */
00060 #define BKP1X   (*(volatile unsigned char *)0x002D) /* 0    0   BK1V5   BK1V4   BK1V3   BK1V2   BK1V1   BK1V0 */
00061 #define BKP1H   (*(volatile unsigned char *)0x002E) /* Bit15    14  13  12  11  10  9   8 */
00062 #define BKP1L   (*(volatile unsigned char *)0x002F) /* Bit7 6   5   4   3   2   1   0 */
00063 #define PPAGE   (*(volatile unsigned char *)0x0030) /* 0    0   PIX5    PIX4    PIX3    PIX2    PIX1    PIX0 */
00064 /* Reserved: 0x0031. */
00065 #define PORTK   (*(volatile unsigned char *)0x0032) /* Bit7 6   5   4   3   2   1   0 */
00066 #define DDRK    (*(volatile unsigned char *)0x0033) /* Bit7 6   5   4   3   2   1   0 */
00067 /* 0x0034  0x003F CRG (Clock and Reset Generator) */
00068 #define SYNR    (*(volatile unsigned char *)0x0034) /* 0    0   SYN5    SYN4    SYN3    SYN2    SYN1    SYN0 */
00069 #define REFDV   (*(volatile unsigned char *)0x0035) /* 0    0   0   0   REFDV3  REFDV2  REFDV1  REFDV0 */
00070 #define CTFLG   (*(volatile unsigned char *)0x0036) /* [test only]  TOUT7   TOUT6   TOUT5   TOUT4   TOUT3   TOUT2   TOUT1   TOUT0 */
00071 #define CRGFLG  (*(volatile unsigned char *)0x0037) /* RTIF PROF    0   LOCKIF  LOCK    TRACK   SCMIF   SCM */
00072 #define CRGINT  (*(volatile unsigned char *)0x0038) /* RTIE 0   0   LOCKIE  0   0   SCMIE   0 */
00073 #define CLKSEL  (*(volatile unsigned char *)0x0039) /* PLLSEL   PSTP    SYSWAI  ROAWAI  PLLWAI  CWAI    RTIWAI  COPWAI */
00074 #define PLLCTL  (*(volatile unsigned char *)0x003A) /* CME  PLLON   AUTO    ACQ 0   PRE PCE SCME */
00075 #define RTICTL  (*(volatile unsigned char *)0x003B) /* 0    RTR6    RTR5    RTR4    RTR3    RTR2    RTR1    RTR0 */
00076 #define COPCTL  (*(volatile unsigned char *)0x003C) /* WCOP RSBCK   0   0   0   CR2 CR1 CR0 */
00077 #define FORBYP  (*(volatile unsigned char *)0x003D) /* [test only]  RTIBYP  COPBYP  0   PLLBYP  0   0   FCM 0 */
00078 #define CTCTL   (*(volatile unsigned char *)0x003E) /* [test only]  TCTL7   TCTL6   TCTL5   TCTL4   TCLT3   TCTL2   TCTL1   TCTL0 */
00079 #define ARMCOP  (*(volatile unsigned char *)0x003F) /* [write]  Bit7    6   5   4   3   2   1   0 */
00080 /* 0x0040  0x007F ECT (Enhanced Capture Timer 16 Bit8 Channels) */
00081 #define TIOS    (*(volatile unsigned char *)0x0040) /* IOS7 IOS6    IOS5    IOS4    IOS3    IOS2    IOS1    IOS0 */
00082 #define CFORC   (*(volatile unsigned char *)0x0041) /* [write]  FOC7    FOC6    FOC5    FOC4    FOC3    FOC2    FOC1    FOC0 */
00083 #define OC7M    (*(volatile unsigned char *)0x0042) /* OC7M7    OC7M6   OC7M5   OC7M4   OC7M3   OC7M2   OC7M1   OC7M0 */
00084 #define OC7D    (*(volatile unsigned char *)0x0043) /* OC7D7    OC7D6   OC7D5   OC7D4   OC7D3   OC7D2   OC7D1   OC7D0 */
00085 #define TCNT_H  (*(volatile unsigned char *)0x0044) /* [high byte] Bit15    14  13  12  11  10  9   8 */
00086 #define TCNT_L  (*(volatile unsigned char *)0x0045) /* [low byte] Bit7  6   5   4   3   2   1   0 */
00087 #define TSCR1   (*(volatile unsigned char *)0x0046) /* TEN  TSWAI   TSFRZ   TFFCA   0   0   0   0 */
00088 #define TTOV    (*(volatile unsigned char *)0x0047) /* TOV7 TOV6    TOV5    TOV4    TOV3    TOV2    TOV1    TOV0 */
00089 #define TCTL1   (*(volatile unsigned char *)0x0048) /* OM7  OL7 OM6 OL6 OM5 OL5 OM4 OL4 */
00090 #define TCTL2   (*(volatile unsigned char *)0x0049) /* OM3  OL3 OM2 OL2 OM1 OL1 OM0 OL0 */
00091 #define TCTL3   (*(volatile unsigned char *)0x004A) /* EDG7B    EDG7A   EDG6B   EDG6A   EDG5B   EDG5A   EDG4B   EDG4A */
00092 #define TCTL4   (*(volatile unsigned char *)0x004B) /* EDG3B    EDG3A   EDG2B   EDG2A   EDG1B   EDG1A   EDG0B   EDG0A */
00093 #define TIE     (*(volatile unsigned char *)0x004C) /* C7I  C6I C5I C4I C3I C2I C1I C0I */
00094 #define TSCR2   (*(volatile unsigned char *)0x004D) /* TOI  0   0   0   TCRE    PR2 PR1 PR0 */
00095 #define TFLG1   (*(volatile unsigned char *)0x004E) /* C7F  C6F C5F C4F C3F C2F C1F C0F */
00096 #define TFLG2   (*(volatile unsigned char *)0x004F) /* TOF  0   0   0   0   0   0   0 */
00097 #define TC0_H   (*(volatile unsigned char *)0x0050) /* [high byte] Bit15    14  13  12  11  10  9   8 */
00098 #define TC0_L   (*(volatile unsigned char *)0x0051) /* [low byte] Bit7  6   5   4   3   2   1   0 */
00099 #define TC1_H   (*(volatile unsigned char *)0x0052) /* [high byte] Bit15    14  13  12  11  10  9   8 */
00100 /* 0x0034  0x003F CRG (Clock and Reset Generator) */
00101 #define TC1_L   (*(volatile unsigned char *)0x0053) /* [low byte] Bit7  6   5   4   3   2   1   0 */
00102 #define TC2_H   (*(volatile unsigned char *)0x0054) /* [high byte] Bit15    14  13  12  11  10  9   8 */
00103 #define TC2_L   (*(volatile unsigned char *)0x0055) /* [low byte] Bit7  6   5   4   3   2   1   0 */
00104 #define TC3_H   (*(volatile unsigned char *)0x0056) /* [high byte] Bit15    14  13  12  11  10  9   8 */
00105 #define TC3_L   (*(volatile unsigned char *)0x0057) /* [low byte] Bit7  6   5   4   3   2   1   0 */
00106 #define TC4_H   (*(volatile unsigned char *)0x0058) /* [high byte] Bit15    14  13  12  11  10  9   8 */
00107 #define TC4_L   (*(volatile unsigned char *)0x0059) /* [low byte] Bit7  6   5   4   3   2   1   0 */
00108 #define TC5_H   (*(volatile unsigned char *)0x005A) /* [high byte] Bit15    14  13  12  11  10  9   8 */
00109 #define TC5_L   (*(volatile unsigned char *)0x005B) /* [low byte] Bit7  6   5   4   3   2   1   0 */
00110 #define TC6_H   (*(volatile unsigned char *)0x005C) /* [high byte] Bit15    14  13  12  11  10  9   8 */
00111 #define TC6_L   (*(volatile unsigned char *)0x005D) /* [low byte] Bit7  6   5   4   3   2   1   0 */
00112 #define TC7_H   (*(volatile unsigned char *)0x005E) /* [high byte] Bit15    14  13  12  11  10  9   8 */
00113 #define TC7_L   (*(volatile unsigned char *)0x005F) /* [low byte] Bit7  6   5   4   3   2   1   0 */
00114 #define PACTL   (*(volatile unsigned char *)0x0060) /* 0    PAEN    PAMOD   PEDGE   CLK1    CLK0    PAOVI   PAI */
00115 #define PAFLG   (*(volatile unsigned char *)0x0061) /* 0    0   0   0   0   0   PAOVF   PAIF */
00116 #define PACN3_H (*(volatile unsigned char *)0x0062) /* [high byte] Bit7 6   5   4   3   2   1   0 */
00117 #define PACN2_L (*(volatile unsigned char *)0x0063) /* [low byte] Bit7  6   5   4   3   2   1   0 */
00118 #define PACN1_H (*(volatile unsigned char *)0x0064) /* [high byte] Bit7 6   5   4   3   2   1   0 */
00119 #define PACN0_L (*(volatile unsigned char *)0x0065) /* [low byte] Bit7  6   5   4   3   2   1   0 */
00120 #define MCCTL   (*(volatile unsigned char *)0x0066) /* MCZI MODMC   RDMCL   0   0   MCEN    MCPR1   MCPR0 */
00121                             /* [write]      ICLAT   FLMC */
00122 #define MCFLG   (*(volatile unsigned char *)0x0067) /* MCZF 0   0   0   POLF3   POLF2   POLF1   POLF0 */
00123 #define ICPAR   (*(volatile unsigned char *)0x0068) /* 0    0   0   0   PA3EN   PA2EN   PA1EN   PA0EN */
00124 #define DLYCT   (*(volatile unsigned char *)0x0069) /* 0    0   0   0   0   0   DLY1    DLY0 */
00125 #define ICOVW   (*(volatile unsigned char *)0x006A) /* NOVW7    NOVW6   NOVW5   NOVW4   NOVW3   NOVW2   NOVW1   NOVW0 */
00126 #define ICSYS   (*(volatile unsigned char *)0x006B) /* SH37 SH26    SH15    SH04    TFMOD   PACMX   BUFEN   LATQ */
00127 /* 0x0040  0x007F ECT (Enhanced Capture Timer 16 Bit8 Channels) */
00128 /* Reserved: 0x006C. */
00129 #define TIMTST  (*(volatile unsigned char *)0x006D) /*[test only] 0 0   0   0   0   0   TCBYP   0 */
00130 /* Reserved: 0x006E. */
00131 /* Reserved: 0x006F. */
00132 #define PBCTL   (*(volatile unsigned char *)0x0070) /* 0    PBEN    0   0   0   0   PBOVI   0 */
00133 #define PBFLG   (*(volatile unsigned char *)0x0071) /* 0    0   0   0   0   0   PBOVF   0 */
00134 #define PA3H    (*(volatile unsigned char *)0x0072) /* Bit7 6   5   4   3   2   1   0 */
00135 #define PA2H    (*(volatile unsigned char *)0x0073) /* Bit7 6   5   4   3   2   1   0 */
00136 #define PA1H    (*(volatile unsigned char *)0x0074) /* Bit7 6   5   4   3   2   1   0 */
00137 #define PA0H    (*(volatile unsigned char *)0x0075) /* Bit7 6   5   4   3   2   1   0 */
00138 #define MCCNT_H (*(volatile unsigned char *)0x0076) /* [high byte] Bit15    14  13  12  11  10  9   8 */
00139 #define MCCNT_L (*(volatile unsigned char *)0x0077) /* [low byte] Bit7  6   5   4   3   2   1   0 */
00140 #define TC0H_H  (*(volatile unsigned char *)0x0078) /* [high byte] Bit15    14  13  12  11  10  9   8 */
00141 #define TC0H_L  (*(volatile unsigned char *)0x0079) /* [low byte] Bit7  6   5   4   3   2   1   0 */
00142 #define TC1H_H  (*(volatile unsigned char *)0x007A) /* [high byte] Bit15    14  13  12  11  10  9   8 */
00143 #define TC1H_L  (*(volatile unsigned char *)0x007B) /* [low byte] Bit7  6   5   4   3   2   1   0 */
00144 #define TC2H_H  (*(volatile unsigned char *)0x007C) /* [high byte] Bit15    14  13  12  11  10  9   8 */
00145 #define TC2H_L  (*(volatile unsigned char *)0x007D) /* [low byte] Bit7  6   5   4   3   2   1   0 */
00146 #define TC3H_H  (*(volatile unsigned char *)0x007E) /* [high byte] Bit15    14  13  12  11  10  9   8 */
00147 #define TC3H_L  (*(volatile unsigned char *)0x007F) /* [low byte] Bit7  6   5   4   3   2   1   0 */
00148 /* 0x0080  0x009F ATD0 (Analog to Digital Converter 10 Bit8 Channel) */
00149 #define ATD0CTL0    (*(volatile unsigned char *)0x0080) /* 0    0   0   0   0   0   0   0 */
00150 #define ATD0CTL1    (*(volatile unsigned char *)0x0081) /* 0    0   0   0   0   0   0   0 */
00151 /* 0x0040  0x007F ECT (Enhanced Capture Timer 16 Bit8 Channels) */
00152 #define ATD0CTL2    (*(volatile unsigned char *)0x0082) /* ADPU AFFC    AWAI    ETRIGLE ETRIGP  ETRIG   ASCIE   ASCIF */
00153 #define ATD0CTL3    (*(volatile unsigned char *)0x0083) /* 0    S8C S4C S2C S1C FIFO    FRZ1    FRZ0 */
00154 #define ATD0CTL4    (*(volatile unsigned char *)0x0084) /* SRES8    SMP1    SMP0    PRS4    PRS3    PRS2    PRS1    PRS0 */
00155 #define ATD0CTL5    (*(volatile unsigned char *)0x0085) /* DJM  DSGN    SCAN    MULT    0   CC  CB  CA */
00156 #define ATD0STAT0   (*(volatile unsigned char *)0x0086) /* SCF  0   ETORF   FIFOR   0   CC2 CC1 CC0 */
00157 /* Reserved: 0x008B. */
00158 #define ATD0TEST0   (*(volatile unsigned char *)0x0088) /* 0    0   0   0   0   0   0   0 */
00159 #define ATD0TEST1   (*(volatile unsigned char *)0x0089) /* 0    0   0   0   0   0   0   SC */
00160 /* Reserved: 0x008A. */
00161 #define ATD0STAT1   (*(volatile unsigned char *)0x008B) /* CCF7 CCF6    CCF5    CCF4    CCF3    CCF2    CCF1    CCF0 */
00162 /* Reserved: 0x008C. */
00163 #define ATD0DIEN    (*(volatile unsigned char *)0x008D) /* Bit7 6   5   4   3   2   1   0 */
00164 /* Reserved: 0x008E. */
00165 #define PORTAD0 (*(volatile unsigned char *)0x008F) /* Bit7 6   5   4   3   2   1   BIT 0 */
00166 #define ATD0DR0H    (*(volatile unsigned char *)0x0090) /* Bit15    14  13  12  11  10  9   8 */
00167 #define ATD0DR0L    (*(volatile unsigned char *)0x0091) /* Bit7 6   0   0   0   0   0   0 */
00168 #define ATD0DR1H    (*(volatile unsigned char *)0x0092) /* Bit15    14  13  12  11  10  9   8 */
00169 #define ATD0DR1L    (*(volatile unsigned char *)0x0093) /* Bit7 6   0   0   0   0   0   0 */
00170 #define ATD0DR2H    (*(volatile unsigned char *)0x0094) /* Bit15    14  13  12  11  10  9   8 */
00171 #define ATD0DR2L    (*(volatile unsigned char *)0x0095) /* Bit7 6   0   0   0   0   0   0 */
00172 #define ATD0DR3H    (*(volatile unsigned char *)0x0096) /* Bit15    14  13  12  11  10  9   8 */
00173 #define ATD0DR3L    (*(volatile unsigned char *)0x0097) /* Bit7 6   0   0   0   0   0   0 */
00174 #define ATD0DR4H    (*(volatile unsigned char *)0x0098) /* Bit15    14  13  12  11  10  9   8 */
00175 #define ATD0DR4L    (*(volatile unsigned char *)0x0099) /* Bit7 6   0   0   0   0   0   0 */
00176 #define ATD0DR5H    (*(volatile unsigned char *)0x009A) /* Bit15    14  13  12  11  10  9   8 */
00177 /* 0x0080  0x009F ATD0 (Analog to Digital Converter 10 Bit8 Channel) */
00178 #define ATD0DR5L    (*(volatile unsigned char *)0x009B) /* Bit7 6   0   0   0   0   0   0 */
00179 #define ATD0DR6H    (*(volatile unsigned char *)0x009C) /* Bit15    14  13  12  11  10  9   8 */
00180 #define ATD0DR6L    (*(volatile unsigned char *)0x009D) /* Bit7 6   0   0   0   0   0   0 */
00181 #define ATD0DR7H    (*(volatile unsigned char *)0x009E) /* Bit15    14  13  12  11  10  9   8 */
00182 #define ATD0DR7L    (*(volatile unsigned char *)0x009F) /* Bit7 6   0   0   0   0   0   0 */
00183 /* 0x00A0  0x00C7 PWM (Pulse Width Modulator 8 Bit8 Channel) */
00184 #define PWME    (*(volatile unsigned char *)0x00A0) /* PWME7    PWME6   PWME5   PWME4   PWME3   PWME2   PWME1   PWME0 */
00185 #define PWMPOL  (*(volatile unsigned char *)0x00A1) /* PPOL7    PPOL6   PPOL5   PPOL4   PPOL3   PPOL2   PPOL1   PPOL0 */
00186 #define PWMCLK  (*(volatile unsigned char *)0x00A2) /* PCLK7    PCLK6   PCLK5   PCLK4   PCLK3   PCLK2   PCLK1   PCLK0 */
00187 #define PWMPRCLK    (*(volatile unsigned char *)0x00A3) /* 0    PCKB2   PCKB1   PCKB0   0   PCKA2   PCKA1   PCKA0 */
00188 #define PWMCAE  (*(volatile unsigned char *)0x00A4) /* CAE7 CAE6    CAE5    CAE4    CAE3    CAE2    CAE1    CAE0 */
00189 #define PWMCTL  (*(volatile unsigned char *)0x00A5) /* CON67    CON45   CON23   CON01   PSWAI   PFRZ    0   0 */
00190 #define PWMTST  (*(volatile unsigned char *)0x00A6) /*[test only]   0   0   0   0   0   0   0   0 */
00191 #define PWMPRSC (*(volatile unsigned char *)0x00A7) /* 0    0   0   0   0   0   0   0 */
00192 #define PWMSCLA (*(volatile unsigned char *)0x00A8) /* Bit7 6   5   4   3   2   1   0 */
00193 #define PWMSCLB (*(volatile unsigned char *)0x00A9) /* Bit7 6   5   4   3   2   1   0 */
00194 #define PWMSCNTA    (*(volatile unsigned char *)0x00AA) /* 0    0   0   0   0   0   0   0 */
00195 #define PWMSCNTB    (*(volatile unsigned char *)0x00AB) /* 0    0   0   0   0   0   0   0 */
00196 #define PWMCNT0 (*(volatile unsigned char *)0x00AC) /* Bit7 6   5   4   3   2   1   0 */
00197 #define PWMCNT1 (*(volatile unsigned char *)0x00AD) /* Bit7 6   5   4   3   2   1   0 */
00198 #define PWMCNT2 (*(volatile unsigned char *)0x00AE) /* Bit7 6   5   4   3   2   1   0 */
00199 #define PWMCNT3 (*(volatile unsigned char *)0x00AF) /* Bit7 6   5   4   3   2   1   0 */
00200 #define PWMCNT4 (*(volatile unsigned char *)0x00B0) /* Bit7 6   5   4   3   2   1   0 */
00201 /* 0x0080  0x009F ATD0 (Analog to Digital Converter 10 Bit8 Channel) */
00202 #define PWMCNT5 (*(volatile unsigned char *)0x00B1) /* Bit7 6   5   4   3   2   1   0 */
00203 #define PWMCNT6 (*(volatile unsigned char *)0x00B2) /* Bit7 6   5   4   3   2   1   0 */
00204 #define PWMCNT7 (*(volatile unsigned char *)0x00B3) /* Bit7 6   5   4   3   2   1   0 */
00205 #define PWMPER0 (*(volatile unsigned char *)0x00B4) /* Bit7 6   5   4   3   2   1   0 */
00206 #define PWMPER1 (*(volatile unsigned char *)0x00B5) /* Bit7 6   5   4   3   2   1   0 */
00207 #define PWMPER2 (*(volatile unsigned char *)0x00B6) /* Bit7 6   5   4   3   2   1   0 */
00208 #define PWMPER3 (*(volatile unsigned char *)0x00B7) /* Bit7 6   5   4   3   2   1   0 */
00209 #define PWMPER4 (*(volatile unsigned char *)0x00B8) /* Bit7 6   5   4   3   2   1   0 */
00210 #define PWMPER5 (*(volatile unsigned char *)0x00B9) /* Bit7 6   5   4   3   2   1   0 */
00211 #define PWMPER6 (*(volatile unsigned char *)0x00BA) /* Bit7 6   5   4   3   2   1   0 */
00212 #define PWMPER7 (*(volatile unsigned char *)0x00BB) /* Bit7 6   5   4   3   2   1   0 */
00213 #define PWMDTY0 (*(volatile unsigned char *)0x00BC) /* Bit7 6   5   4   3   2   1   0 */
00214 #define PWMDTY1 (*(volatile unsigned char *)0x00BD) /* Bit7 6   5   4   3   2   1   0 */
00215 #define PWMDTY2 (*(volatile unsigned char *)0x00BE) /* Bit7 6   5   4   3   2   1   0 */
00216 #define PWMDTY3 (*(volatile unsigned char *)0x00BF) /* Bit7 6   5   4   3   2   1   0 */
00217 #define PWMDTY4 (*(volatile unsigned char *)0x00C0) /* Bit7 6   5   4   3   2   1   0 */
00218 #define PWMDTY5 (*(volatile unsigned char *)0x00C1) /* Bit7 6   5   4   3   2   1   0 */
00219 #define PWMDTY6 (*(volatile unsigned char *)0x00C2) /* Bit7 6   5   4   3   2   1   0 */
00220 #define PWMDTY7 (*(volatile unsigned char *)0x00C3) /* Bit7 6   5   4   3   2   1   0 */
00221 #define PWMSDN  (*(volatile unsigned char *)0x00C4) /* PWMIF    PWMIE   PWMRS   TRT PWMLVL  0   PWM7IN  PWM7IN  PWM7E */
00222 /* Reserved: 0x00C5. */
00223 /* Reserved: 0x00C6. */
00224 /* Reserved: 0x00C7. */
00225 /* 0x00A0  0x00C7 PWM (Pulse Width Modulator 8 Bit8 Channel) */
00226 /* 0x00C8  0x00CF SCI0 (Asynchronous Serial Interface) */
00227 #define SCI0BDH (*(volatile unsigned char *)0x00C8) /* 0    0   0   SBR12   SBR11   SBR10   SBR9    SBR8 */
00228 #define SCI0BDL (*(volatile unsigned char *)0x00C9) /* SBR7 SBR6    SBR5    SBR4    SBR3    SBR2    SBR1    SBR0 */
00229 #define SCI0CR1 (*(volatile unsigned char *)0x00CA) /* LOOPS    SCISWAI RSRC    M   WAKE    ILT PE  PT */
00230 #define SCI0CR2 (*(volatile unsigned char *)0x00CB) /* TIE  TCIE    RIE ILIE    TE  RE  RWU SBK */
00231 #define SCI0SR1 (*(volatile unsigned char *)0x00CC) /* TDRE TC  RDRF    IDLE    OR  NF  FE  PF */
00232 #define SCI0SR2 (*(volatile unsigned char *)0x00CD) /* 0    0   0   0   0   BRK13   TXDIR   RAF */
00233 #define SCI0DRH (*(volatile unsigned char *)0x00CE) /* R8   T8  0   0   0   0   0   0 */
00234 #define SCI0DRL (*(volatile unsigned char *)0x00CF) /* R7   R6  R5  R4  R3  R2  R1  R0 */
00235                         /* [write]  T7  T6  T5  T4  T3  T2  T1  T0 */
00236 /* 0x00D0  0x00D7 SCI1 (Asynchronous Serial Interface) */
00237 #define SCI1BDH (*(volatile unsigned char *)0x00D0) /* 0    0   0   SBR12   SBR11   SBR10   SBR9    SBR8 */
00238 #define SCI1BDL (*(volatile unsigned char *)0x00D1) /* SBR7 SBR6    SBR5    SBR4    SBR3    SBR2    SBR1    SBR0 */
00239 #define SCI1CR1 (*(volatile unsigned char *)0x00D2) /* LOOPS    SCISWAI RSRC    M   WAKE    ILT PE  PT */
00240 #define SCI1CR2 (*(volatile unsigned char *)0x00D3) /* TIE  TCIE    RIE ILIE    TE  RE  RWU SBK */
00241 #define SCI1SR1 (*(volatile unsigned char *)0x00D4) /* TDRE TC  RDRF    IDLE    OR  NF  FE  PF */
00242 #define SCI1SR2 (*(volatile unsigned char *)0x00D5) /* 0    0   0   0   0   BRK13   TXDIR   RAF */
00243 #define SCI1DRH (*(volatile unsigned char *)0x00D6) /* R8   T8  0   0   0   0   0   0 */
00244 #define SCI1DRL (*(volatile unsigned char *)0x00D7) /* R7   R6  R5  R4  R3  R2  R1  R0 */
00245                         /* [write]  T7  T6  T5  T4  T3  T2  T1  T0 */
00246 /* 0x00D8  0x00DF SPI0 (Serial Peripheral Interface) */
00247 #define SPI0CR1 (*(volatile unsigned char *)0x00D8) /* SPIE SPE SPTIE   MSTR    CPOL    CPHA    SSOE    LSBFE */
00248 #define SPI0CR2 (*(volatile unsigned char *)0x00D9) /* 0    0   0   MODFEN  BIDIROE 0   SPISWAI SPC0 */
00249 #define SPI0BR  (*(volatile unsigned char *)0x00DA) /* 0    SPPR2   SPPR1   SPPR0   0   SPR2    SPR1    SPR0 */
00250 #define SPI0SR  (*(volatile unsigned char *)0x00DB) /* SPIF 0   SPTEF   MODF    0   0   0   0 */
00251 /* Reserved: 0x00DC. */
00252 #define SPI0DR  (*(volatile unsigned char *)0x00DD) /* Bit7 6   5   4   3   2   1   0 */
00253 /* Reserved: 0x00DE. */
00254 /* Reserved: 0x00DF. */
00255 /* 0x00E0  0x00E7 IIC (Inter IC Bus) */
00256 #define IBAD    (*(volatile unsigned char *)0x00E0) /* ADR7 ADR6    ADR5    ADR4    ADR3    ADR2    ADR1    0 */
00257 #define IBFD    (*(volatile unsigned char *)0x00E1) /* IBC7 IBC6    IBC5    IBC4    IBC3    IBC2    IBC1    IBC0 */
00258 #define IBCR    (*(volatile unsigned char *)0x00E2) /* IBEN IBIE    MS/SL   TX/RX   TXAK    0   0   IBSWAI */
00259             /* [write]                  RSTA */
00260 #define IBSR    (*(volatile unsigned char *)0x00E3) /* TCF  IAAS    IBB IBAL    0   SRW IBIF    RXAK */
00261 #define IBDR    (*(volatile unsigned char *)0x00E4) /* D7   D6  D5  D4  D3  D2  D1  D   0 */
00262 /* Reserved: 0x00E5. */
00263 /* Reserved: 0x00E6. */
00264 /* Reserved: 0x00E7. */
00265 /* 0x00E8  0x00EF BDLC (Bytelevel Data Link Controller J1850) */
00266 #define DLCBCR1 (*(volatile unsigned char *)0x00E8) /* IMSG CLKS    0   0   0   0   IE  WCM */
00267 #define DLCBSVR (*(volatile unsigned char *)0x00E9) /* 0    0   I3  I2  I1  I0  0   0 */
00268 #define DLCBCR2 (*(volatile unsigned char *)0x00EA) /* SMRST    DLOOP   RX4XE   NBFS    TEOD    TSIFR   TMIFR1  TMIFR0 */
00269 #define DLCBDR  (*(volatile unsigned char *)0x00EB) /* D7   D6  D5  D4  D3  D2  D1  D0 */
00270 #define DLCBARD (*(volatile unsigned char *)0x00EC) /* 0    RXPOL   0   0   BO3 BO2 BO1 BO0 */
00271 #define DLCBRSR (*(volatile unsigned char *)0x00ED) /* 0    0   R5  R4  R3  R2  R1  R0 */
00272 #define DLCSCR  (*(volatile unsigned char *)0x00EE) /* 0    0   0   BDLCE   0   0   0   0 */
00273 #define DLCBSTAT    (*(volatile unsigned char *)0x00EF) /* 0    0   0   0   0   0   0   IDLE */
00274 /* 0x00D8  0x00DF SPI0 (Serial Peripheral Interface) */
00275 /* 0x00F0  0x00F7 SPI1 (Serial Peripheral Interface) */
00276 #define SPI1CR1 (*(volatile unsigned char *)0x00F0) /* SPIE SPE SPTIE   MSTR    CPOL    CPHA    SSOE    LSBFE */
00277 #define SPI1CR2 (*(volatile unsigned char *)0x00F1) /* 0    0   0   MODFEN  BIDIROE 0   SPISWAI SPC0 */
00278 #define SPI1BR  (*(volatile unsigned char *)0x00F2) /* 0    SPPR2   SPPR1   SPPR0   0   SPR2    SPR1    SPR0 */
00279 #define SPI1SR  (*(volatile unsigned char *)0x00F3) /* SPIF 0   SPTEF   MODF    0   0   0   0 */
00280 /* Reserved: 0x00F4. */
00281 #define SPI1DR  (*(volatile unsigned char *)0x00F5) /* Bit7 6   5   4   3   2   1   0 */
00282 /* Reserved: 0x00F6. */
00283 /* Reserved: 0x00F7. */
00284 /* 0x00F8  0x00FF SPI2 (Serial Peripheral Interface) */
00285 #define SPI2CR1 (*(volatile unsigned char *)0x00F8) /* SPIE SPE SPTIE   MSTR    CPOL    CPHA    SSOE    LSBFE */
00286 #define SPI2CR2 (*(volatile unsigned char *)0x00F9) /* 0    0   0   MODFEN  BIDIROE 0   SPISWAI SPC0 */
00287 #define SPI2BR  (*(volatile unsigned char *)0x00FA) /* 0    SPPR2   SPPR1   SPPR0   0   SPR2    SPR1    SPR0 */
00288 #define SPI2SR  (*(volatile unsigned char *)0x00FB) /* SPIF 0   SPTEF   MODF    0   0   0   0 */
00289 /* Reserved: 0x00FC. */
00290 #define SPI2DR  (*(volatile unsigned char *)0x00FD) /* Bit7 6   5   4   3   2   1   0 */
00291 /* Reserved: 0x00FE. */
00292 /* Reserved: 0x00FF. */
00293 /* 0x0100  0x010F Flash Control Register (fts512k4) */
00294 #define FCLKDIV (*(volatile unsigned char *)0x0100) /* FDIVLD   PRDIV8  FDIV5   FDIV4   FDIV3   FDIV2   FDIV1   FDIV0 */
00295 #define FSEC    (*(volatile unsigned char *)0x0101) /* KEYEN    NV6 NV5 NV4 NV3 NV2 SEC1    SEC0 */
00296 #define FTSTMOD (*(volatile unsigned char *)0x0102) /* 0    0   0   WRALL   0   0   0   0 */
00297 #define FCNFG   (*(volatile unsigned char *)0x0103) /* CBEIE    CCIE    KEYACC  0   0   0   BKSEL1  BKSEL0 */
00298 #define FPROT   (*(volatile unsigned char *)0x0104) /* FPOPEN   NV6 FPHDIS  FPHS1   FPHS0   FPLDIS  FPLS1   FPLS0 */
00299 #define FSTAT   (*(volatile unsigned char *)0x0105) /* CBEIF    CCIF    PVIOL   ACCERR  0   BLANK   0   0 */
00300 #define FCMD    (*(volatile unsigned char *)0x0106) /* 0    CMDB6   CMDB5   0   0   CMDB2   0   CMDB0 */
00301 /* Reserved for factory test: 0x0107. */
00302 #define FADDRHI (*(volatile unsigned char *)0x0108) /* 0    Bit14   13  12  11  10  9   8 */
00303 #define FADDRLO (*(volatile unsigned char *)0x0109) /* Bit7 6   5   4   3   2   1   0 */
00304 #define FDATAHI (*(volatile unsigned char *)0x010A) /* Bit15    14  13  12  11  10  9   8 */
00305 #define FDATALO (*(volatile unsigned char *)0x010B) /* Bit7 6   5   4   3   2   1   0 */
00306 /* Reserved: 0x010C. */
00307 /* Reserved: 0x010D. */
00308 /* Reserved: 0x010E. */
00309 /* Reserved: 0x010F. */
00310 /* 0x0110  0x011B EEPROM Control Register (eets4k) */
00311 #define ECLKDIV (*(volatile unsigned char *)0x0110) /* EDIVLD   PRDIV8  EDIV5   EDIV4   EDIV3   EDIV2   EDIV1   EDIV0 */
00312 /* Reserved: 0x0111. */
00313 /* Reserved for factory test: 0x0112. */
00314 #define ECNFG   (*(volatile unsigned char *)0x0113) /* CBEIE    CCIE    0   0   0   0   0   0 */
00315 #define EPROT   (*(volatile unsigned char *)0x0114) /* EPOPEN   NV6 NV5 NV4 EPDIS   EP2 EP1 EP0 */
00316 #define ESTAT   (*(volatile unsigned char *)0x0115) /* CBEIF    CCIF    PVIOL   ACCERR  0   BLANK   0   0 */
00317 #define ECMD    (*(volatile unsigned char *)0x0116) /* 0    CMDB6   CMDB5   0   0   CMDB2   0   CMDB0 */
00318 /* Reserved for factory test: 0x0117. */
00319 #define EADDRHI (*(volatile unsigned char *)0x0118) /* 0    0   0   0   0   10  9   Bit8 */
00320 /* 0x0100  0x010F Flash Control Register (fts512k4) */
00321 #define EADDRLO (*(volatile unsigned char *)0x0119) /* Bit7 6   5   4   3   2   1   0 */
00322 #define EDATAHI (*(volatile unsigned char *)0x011A) /* Bit15    14  13  12  11  10  9   8 */
00323 #define EDATALO (*(volatile unsigned char *)0x011B) /* Bit7 6   5   4   3   2   1   0 */
00324 /* Reserved: 0x011C (RAM Control Register). */
00325 /* Reserved: 0x011D (RAM Control Register). */
00326 /* Reserved: 0x011E (RAM Control Register). */
00327 /* Reserved: 0x011F (RAM Control Register). */
00328 /* 0x0120  0x013F ATD1 (Analog to Digital Converter 10 Bit8 Channel) */
00329 #define ATD1CTL0    (*(volatile unsigned char *)0x0120) /* 0    0   0   0   0   0   0   0 */
00330 #define ATD1CTL1    (*(volatile unsigned char *)0x0121) /* 0    0   0   0   0   0   0   0 */
00331 #define ATD1CTL2    (*(volatile unsigned char *)0x0122) /* ADPU AFFC    AWAI    ETRIGLE ETRIGP  ETRIG   ASCIE   ASCIF */
00332 #define ATD1CTL3    (*(volatile unsigned char *)0x0123) /* 0    S8C S4C S2C S1C FIFO    FRZ1    FRZ0 */
00333 #define ATD1CTL4    (*(volatile unsigned char *)0x0124) /* SRES8    SMP1    SMP0    PRS4    PRS3    PRS2    PRS1    PRS0 */
00334 #define ATD1CTL5    (*(volatile unsigned char *)0x0125) /* DJM  DSGN    SCAN    MULT    0   CC  CB  CA */
00335 #define ATD1STAT0   (*(volatile unsigned char *)0x0126) /* SCF  0   ETORF   FIFOR   0   CC2 CC1 CC0 */
00336 /* Reserved: 0x0127. */
00337 #define ATD1TEST0   (*(volatile unsigned char *)0x0128) /* 0    0   0   0   0   0   0   0 */
00338 #define ATD1TEST1   (*(volatile unsigned char *)0x0129) /* 0    0   0   0   0   0   0   SC */
00339 /* Reserved: 0x012A. */
00340 #define ATD1STAT1   (*(volatile unsigned char *)0x012B) /* CCF7 CCF6    CCF5    CCF4    CCF3    CCF2    CCF1    CCF0 */
00341 /* Reserved: 0x012C. */
00342 /* 0x0110  0x011B EEPROM Control Register (eets4k) */
00343 #define ATD1DIEN    (*(volatile unsigned char *)0x012D) /* Bit7 6   5   4   3   2   1   0 */
00344 /* Reserved: 0x012E. */
00345 #define PORTAD1 (*(volatile unsigned char *)0x012F) /* Bit7 6   5   4   3   2   1   BIT 0 */
00346 #define ATD1DR0H    (*(volatile unsigned char *)0x0130) /* Bit15    14  13  12  11  10  9   8 */
00347 #define ATD1DR0L    (*(volatile unsigned char *)0x0131) /* Bit7 6   0   0   0   0   0   0 */
00348 #define ATD1DR1H    (*(volatile unsigned char *)0x0132) /* Bit15    14  13  12  11  10  9   8 */
00349 #define ATD1DR1L    (*(volatile unsigned char *)0x0133) /* Bit7 6   0   0   0   0   0   0 */
00350 #define ATD1DR2H    (*(volatile unsigned char *)0x0134) /* Bit15    14  13  12  11  10  9   8 */
00351 #define ATD1DR2L    (*(volatile unsigned char *)0x0135) /* Bit7 6   0   0   0   0   0   0 */
00352 #define ATD1DR3H    (*(volatile unsigned char *)0x0136) /* Bit15    14  13  12  11  10  9   8 */
00353 #define ATD1DR3L    (*(volatile unsigned char *)0x0137) /* Bit7 6   0   0   0   0   0   0 */
00354 #define ATD1DR4H    (*(volatile unsigned char *)0x0138) /* Bit15    14  13  12  11  10  9   8 */
00355 #define ATD1DR4L    (*(volatile unsigned char *)0x0139) /* Bit7 6   0   0   0   0   0   0 */
00356 #define ATD1DR5H    (*(volatile unsigned char *)0x013A) /* Bit15    14  13  12  11  10  9   8 */
00357 #define ATD1DR5L    (*(volatile unsigned char *)0x013B) /* Bit7 6   0   0   0   0   0   0 */
00358 #define ATD1DR6H    (*(volatile unsigned char *)0x013C) /* Bit15    14  13  12  11  10  9   8 */
00359 #define ATD1DR6L    (*(volatile unsigned char *)0x013D) /* Bit7 6   0   0   0   0   0   0 */
00360 #define ATD1DR7H    (*(volatile unsigned char *)0x013E) /* Bit15    14  13  12  11  10  9   8 */
00361 #define ATD1DR7L    (*(volatile unsigned char *)0x013F) /* Bit7 6   0   0   0   0   0   0 */
00362 /* 0x0140  0x017F CAN0 (Motorola Scalable CAN  MSCAN) */
00363 #define CAN0CTL0    (*(volatile unsigned char *)0x0140) /* RXFRM    RXACT   CSWAI   SYNCH   TIME    WUPE    SLPRQ   INITRQ */
00364 #define CAN0CTL1    (*(volatile unsigned char *)0x0141) /* CANE CLKSRC  LOOPB   LISTEN  0   WUPM    SLPAK   INITAK */
00365 #define CAN0BTR0    (*(volatile unsigned char *)0x0142) /* SJW1 SJW0    BRP5    BRP4    BRP3    BRP2    BRP1    BRP0 */
00366 /* 0x0120  0x013F ATD1 (Analog to Digital Converter 10 Bit8 Channel) */
00367 #define CAN0BTR1    (*(volatile unsigned char *)0x0143) /* SAMP TSEG22  TSEG21  TSEG20  TSEG13  TSEG12  TSEG11  TSEG10 */
00368 #define CAN0RFLG    (*(volatile unsigned char *)0x0144) /* WUPIF    CSCIF   RSTAT1  RSTAT0  TSTAT1  TSTAT0  OVRIF   RXF */
00369 #define CAN0RIER    (*(volatile unsigned char *)0x0145) /* WUPIE    CSCIE   RSTATE1 RSTATE0 TSTATE1 TSTATE0 OVRIE   RXFIE */
00370 #define CAN0TFLG    (*(volatile unsigned char *)0x0146) /* 0    0   0   0   0   TXE2    TXE1    TXE0 */
00371 #define CAN0TIER    (*(volatile unsigned char *)0x0147) /* 0    0   0   0   0   TXEIE2  TXEIE1  TXEIE0 */
00372 #define CAN0TARQ    (*(volatile unsigned char *)0x0148) /* 0    0   0   0   0   ABTRQ2  ABTRQ1  ABTRQ0 */
00373 #define CAN0TAAK    (*(volatile unsigned char *)0x0149) /* 0    0   0   0   0   ABTAK2  ABTAK1  ABTAK0 */
00374 #define CAN0TBSEL   (*(volatile unsigned char *)0x014A) /* 0    0   0   0   0   TX2 TX1 TX0 */
00375 #define CAN0IDAC    (*(volatile unsigned char *)0x014B) /* 0    0   IDAM1   IDAM0   0   IDHIT2  IDHIT1  IDHIT0 */
00376 /* Reserved: 0x014C. */
00377 /* Reserved: 0x014D. */
00378 #define CAN0RXERR   (*(volatile unsigned char *)0x014E) /* RXERR7   RXERR6  RXERR5  RXERR4  RXERR3  RXERR2  RXERR1  RXERR0 */
00379 #define CAN0TXERR   (*(volatile unsigned char *)0x014F) /* TXERR7   TXERR6  TXERR5  TXERR4  TXERR3  TXERR2  TXERR1  TXERR0 */
00380 #define CAN0IDAR0   (*(volatile unsigned char *)0x0150) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00381 #define CAN0IDAR1   (*(volatile unsigned char *)0x0151) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00382 #define CAN0IDAR2   (*(volatile unsigned char *)0x0152) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00383 #define CAN0IDAR3   (*(volatile unsigned char *)0x0153) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00384 #define CAN0IDMR0   (*(volatile unsigned char *)0x0154) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00385 #define CAN0IDMR1   (*(volatile unsigned char *)0x0155) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00386 #define CAN0IDMR2   (*(volatile unsigned char *)0x0156) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00387 #define CAN0IDMR3   (*(volatile unsigned char *)0x0157) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00388 #define CAN0IDAR4   (*(volatile unsigned char *)0x0158) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00389 #define CAN0IDAR5   (*(volatile unsigned char *)0x0159) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00390 #define CAN0IDAR6   (*(volatile unsigned char *)0x015A) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00391 #define CAN0IDAR7   (*(volatile unsigned char *)0x015B) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00392 #define CAN0IDMR4   (*(volatile unsigned char *)0x015C) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00393 #define CAN0IDMR5   (*(volatile unsigned char *)0x015D) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00394 #define CAN0IDMR6   (*(volatile unsigned char *)0x015E) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00395 #define CAN0IDMR7   (*(volatile unsigned char *)0x015F) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00396 #define CAN0RXFG    (*(volatile unsigned char *)0x0160) /* FOREGROUND   RECEIVE BUFFER  see Table 12 */
00397                         /*  ... 0x016F */
00398 #define CAN0TXFG    (*(volatile unsigned char *)0x0170) /* FOREGROUND   TRANSMIT    BUFFER  see Table 12 */
00399                         /* ...  0x017F */
00400 /* 0x0180  0x01BF CAN1 (Motorola Scalable CAN  MSCAN) */
00401 #define CAN1CTL0    (*(volatile unsigned char *)0x0180) /* RXFRM    RXACT   CSWAI   SYNCH   TIME    WUPE    SLPRQ   INITRQ */
00402 #define CAN1CTL1    (*(volatile unsigned char *)0x0181) /* CANE CLKSRC  LOOPB   LISTEN  0   WUPM    SLPAK   INITAK */
00403 #define CAN1BTR0    (*(volatile unsigned char *)0x0182) /* SJW1 SJW0    BRP5    BRP4    BRP3    BRP2    BRP1    BRP0 */
00404 #define CAN1BTR1    (*(volatile unsigned char *)0x0183) /* SAMP TSEG22  TSEG21  TSEG20  TSEG13  TSEG12  TSEG11  TSEG10 */
00405 #define CAN1RFLG    (*(volatile unsigned char *)0x0184) /* WUPIF    CSCIF   RSTAT1  RSTAT0  TSTAT1  TSTAT0  OVRIF   RXF */
00406 #define CAN1RIER    (*(volatile unsigned char *)0x0185) /* WUPIE    CSCIE   RSTATE1 RSTATE0 TSTATE1 TSTATE0 OVRIE   RXFIE */
00407 #define CAN1TFLG    (*(volatile unsigned char *)0x0186) /* 0    0   0   0   0   TXE2    TXE1    TXE0 */
00408 #define CAN1TIER    (*(volatile unsigned char *)0x0187) /* 0    0   0   0   0   TXEIE2  TXEIE1  TXEIE0 */
00409 #define CAN1TARQ    (*(volatile unsigned char *)0x0188) /* 0    0   0   0   0   ABTRQ2  ABTRQ1  ABTRQ0 */
00410 #define CAN1TAAK    (*(volatile unsigned char *)0x0189) /* 0    0   0   0   0   ABTAK2  ABTAK1  ABTAK0 */
00411 #define CAN1TBSEL   (*(volatile unsigned char *)0x018A) /* 0    0   0   0   0   TX2 TX1 TX0 */
00412 #define CAN1IDAC    (*(volatile unsigned char *)0x018B) /* 0    0   IDAM1   IDAM0   0   IDHIT2  IDHIT1  IDHIT0 */
00413 /* Reserved: 0x018C. */
00414 /* Reserved: 0x018D. */
00415 #define CAN1RXERR   (*(volatile unsigned char *)0x018E) /* RXERR7   RXERR6  RXERR5  RXERR4  RXERR3  RXERR2  RXERR1  RXERR0 */
00416 #define CAN1TXERR   (*(volatile unsigned char *)0x018F) /* TXERR7   TXERR6  TXERR5  TXERR4  TXERR3  TXERR2  TXERR1  TXERR0 */
00417 #define CAN1IDAR0   (*(volatile unsigned char *)0x0190) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00418 #define CAN1IDAR1   (*(volatile unsigned char *)0x0191) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00419 #define CAN1IDAR2   (*(volatile unsigned char *)0x0192) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00420 #define CAN1IDAR3   (*(volatile unsigned char *)0x0193) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00421 #define CAN1IDMR0   (*(volatile unsigned char *)0x0194) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00422 #define CAN1IDMR1   (*(volatile unsigned char *)0x0195) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00423 #define CAN1IDMR2   (*(volatile unsigned char *)0x0196) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00424 #define CAN1IDMR3   (*(volatile unsigned char *)0x0197) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00425 #define CAN1IDAR4   (*(volatile unsigned char *)0x0198) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00426 #define CAN1IDAR5   (*(volatile unsigned char *)0x0199) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00427 #define CAN1IDAR6   (*(volatile unsigned char *)0x019A) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00428 #define CAN1IDAR7   (*(volatile unsigned char *)0x019B) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00429 #define CAN1IDMR4   (*(volatile unsigned char *)0x019C) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00430 #define CAN1IDMR5   (*(volatile unsigned char *)0x019D) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00431 #define CAN1IDMR6   (*(volatile unsigned char *)0x019E) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00432 #define CAN1IDMR7   (*(volatile unsigned char *)0x019F) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00433 #define CAN1RXFG    (*(volatile unsigned char *)0x01A0) /* FOREGROUND   RECEIVE BUFFER  see Table 12 */
00434                         /* ...  0x01AF */
00435 #define CAN1TXFG    (*(volatile unsigned char *)0x01B0) /* FOREGROUND   TRANSMIT    BUFFER  see Table 12 */
00436                         /* ...  0x01BF */
00437 /* 0x01C0  0x01FF CAN2 (Motorola Scalable CAN  MSCAN) */
00438 #define CAN2CTL0    (*(volatile unsigned char *)0x01C0) /* RXFRM    RXACT   CSWAI   SYNCH   TIME    WUPE    SLPRQ   INITRQ */
00439 #define CAN2CTL1    (*(volatile unsigned char *)0x01C1) /* CANE CLKSRC  LOOPB   LISTEN  0   WUPM    SLPAK   INITAK */
00440 #define CAN2BTR0    (*(volatile unsigned char *)0x01C2) /* SJW1 SJW0    BRP5    BRP4    BRP3    BRP2    BRP1    BRP0 */
00441 #define CAN2BTR1    (*(volatile unsigned char *)0x01C3) /* SAMP TSEG22  TSEG21  TSEG20  TSEG13  TSEG12  TSEG11  TSEG10 */
00442 #define CAN2RFLG    (*(volatile unsigned char *)0x01C4) /* WUPIF    CSCIF   RSTAT1  RSTAT0  TSTAT1  TSTAT0  OVRIF   RXF */
00443 #define CAN2RIER    (*(volatile unsigned char *)0x01C5) /* WUPIE    CSCIE   RSTATE1 RSTATE0 TSTATE1 TSTATE0 OVRIE   RXFIE */
00444 #define CAN2TFLG    (*(volatile unsigned char *)0x01C6) /* 0    0   0   0   0   TXE2    TXE1    TXE0 */
00445 #define CAN2TIER    (*(volatile unsigned char *)0x01C7) /* 0    0   0   0   0   TXEIE2  TXEIE1  TXEIE0 */
00446 #define CAN2TARQ    (*(volatile unsigned char *)0x01C8) /* 0    0   0   0   0   ABTRQ2  ABTRQ1  ABTRQ0 */
00447 #define CAN2TAAK    (*(volatile unsigned char *)0x01C9) /* 0    0   0   0   0   ABTAK2  ABTAK1  ABTAK0 */
00448 #define CAN2TBSEL   (*(volatile unsigned char *)0x01CA) /* 0    0   0   0   0   TX2 TX1 TX0 */
00449 #define CAN2IDAC    (*(volatile unsigned char *)0x01CB) /* 0    0   IDAM1   IDAM0   0   IDHIT2  IDHIT1  IDHIT0 */
00450 /* Reserved: 0x01CC. */
00451 /* 0x0180  0x01BF CAN1 (Motorola Scalable CAN  MSCAN) */
00452 /* Reserved: 0x01CD. */
00453 #define CAN2RXERR   (*(volatile unsigned char *)0x01CE) /* RXERR7   RXERR6  RXERR5  RXERR4  RXERR3  RXERR2  RXERR1  RXERR0 */
00454 #define CAN2TXERR   (*(volatile unsigned char *)0x01CF) /* TXERR7   TXERR6  TXERR5  TXERR4  TXERR3  TXERR2  TXERR1  TXERR0 */
00455 #define CAN2IDAR0   (*(volatile unsigned char *)0x01D0) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00456 #define CAN2IDAR1   (*(volatile unsigned char *)0x01D1) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00457 #define CAN2IDAR2   (*(volatile unsigned char *)0x01D2) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00458 #define CAN2IDAR3   (*(volatile unsigned char *)0x01D3) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00459 #define CAN2IDMR0   (*(volatile unsigned char *)0x01D4) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00460 #define CAN2IDMR1   (*(volatile unsigned char *)0x01D5) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00461 #define CAN2IDMR2   (*(volatile unsigned char *)0x01D6) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00462 #define CAN2IDMR3   (*(volatile unsigned char *)0x01D7) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00463 #define CAN2IDAR4   (*(volatile unsigned char *)0x01D8) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00464 #define CAN2IDAR5   (*(volatile unsigned char *)0x01D9) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00465 #define CAN2IDAR6   (*(volatile unsigned char *)0x01DA) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00466 #define CAN2IDAR7   (*(volatile unsigned char *)0x01DB) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00467 #define CAN2IDMR4   (*(volatile unsigned char *)0x01DC) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00468 #define CAN2IDMR5   (*(volatile unsigned char *)0x01DD) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00469 #define CAN2IDMR6   (*(volatile unsigned char *)0x01DE) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00470 #define CAN2IDMR7   (*(volatile unsigned char *)0x01DF) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00471 #define CAN2RXFG    (*(volatile unsigned char *)0x01E0) /* FOREGROUND   RECEIVE BUFFER  see Table 12 */
00472                         /* ...  0x01EF */
00473 #define CAN2TXFG    (*(volatile unsigned char *)0x01F0) /* FOREGROUND   TRANSMIT    BUFFER  see Table 12 */
00474                         /* ...  0x01FF */
00475 /* 0x01C0  0x01FF CAN2 (Motorola Scalable CAN  MSCAN) */
00476 /* 0x0200  0x023F CAN3 (Motorola Scalable CAN  MSCAN) */
00477 #define CAN3CTL0    (*(volatile unsigned char *)0x0200) /* RXFRM    RXACT   CSWAI   SYNCH   TIME    WUPE    SLPRQ   INITRQ */
00478 #define CAN3CTL1    (*(volatile unsigned char *)0x0201) /* CANE CLKSRC  LOOPB   LISTEN  0   WUPM    SLPAK   INITAK */
00479 #define CAN3BTR0    (*(volatile unsigned char *)0x0202) /* SJW1 SJW0    BRP5    BRP4    BRP3    BRP2    BRP1    BRP0 */
00480 #define CAN3BTR1    (*(volatile unsigned char *)0x0203) /* SAMP TSEG22  TSEG21  TSEG20  TSEG13  TSEG12  TSEG11  TSEG10 */
00481 #define CAN3RFLG    (*(volatile unsigned char *)0x0204) /* WUPIF    CSCIF   RSTAT1  RSTAT0  TSTAT1  TSTAT0  OVRIF   RXF */
00482 #define CAN3RIER    (*(volatile unsigned char *)0x0205) /* WUPIE    CSCIE   RSTATE1 RSTATE0 TSTATE1 TSTATE0 OVRIE   RXFIE */
00483 #define CAN3TFLG    (*(volatile unsigned char *)0x0206) /* 0    0   0   0   0   TXE2    TXE1    TXE0 */
00484 #define CAN3TIER    (*(volatile unsigned char *)0x0207) /* 0    0   0   0   0   TXEIE2  TXEIE1  TXEIE0 */
00485 #define CAN3TARQ    (*(volatile unsigned char *)0x0208) /* 0    0   0   0   0   ABTRQ2  ABTRQ1  ABTRQ0 */
00486 #define CAN3TAAK    (*(volatile unsigned char *)0x0209) /* 0    0   0   0   0   ABTAK2  ABTAK1  ABTAK0 */
00487 #define CAN3TBSEL   (*(volatile unsigned char *)0x020A) /* 0    0   0   0   0   TX2 TX1 TX0 */
00488 #define CAN3IDAC    (*(volatile unsigned char *)0x020B) /* 0    0   IDAM1   IDAM0   0   IDHIT2  IDHIT1  IDHIT0 */
00489 /* Reserved: 0x020C. */
00490 /* Reserved: 0x020D. */
00491 #define CAN3RXERR   (*(volatile unsigned char *)0x020E) /* RXERR7   RXERR6  RXERR5  RXERR4  RXERR3  RXERR2  RXERR1  RXERR0 */
00492 #define CAN3TXERR   (*(volatile unsigned char *)0x020F) /* TXERR7   TXERR6  TXERR5  TXERR4  TXERR3  TXERR2  TXERR1  TXERR0 */
00493 #define CAN3IDAR0   (*(volatile unsigned char *)0x0210) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00494 #define CAN3IDAR1   (*(volatile unsigned char *)0x0211) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00495 #define CAN3IDAR2   (*(volatile unsigned char *)0x0212) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00496 #define CAN3IDAR3   (*(volatile unsigned char *)0x0213) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00497 #define CAN3IDMR0   (*(volatile unsigned char *)0x0214) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00498 #define CAN3IDMR1   (*(volatile unsigned char *)0x0215) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00499 #define CAN3IDMR2   (*(volatile unsigned char *)0x0216) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00500 #define CAN3IDMR3   (*(volatile unsigned char *)0x0217) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00501 #define CAN3IDAR4   (*(volatile unsigned char *)0x0218) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00502 #define CAN3IDAR5   (*(volatile unsigned char *)0x0219) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00503 #define CAN3IDAR6   (*(volatile unsigned char *)0x021A) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00504 #define CAN3IDAR7   (*(volatile unsigned char *)0x021B) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00505 #define CAN3IDMR4   (*(volatile unsigned char *)0x021C) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00506 #define CAN3IDMR5   (*(volatile unsigned char *)0x021D) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00507 #define CAN3IDMR6   (*(volatile unsigned char *)0x021E) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00508 #define CAN3IDMR7   (*(volatile unsigned char *)0x021F) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00509 #define CAN3RXFG    (*(volatile unsigned char *)0x0220) /* FOREGROUND   RECEIVE BUFFER  see Table 12 */
00510                         /* ...  0x022F */
00511 #define CAN3TXFG    (*(volatile unsigned char *)0x0230) /* FOREGROUND   TRANSMIT    BUFFER  see Table 12 */
00512                         /* ...  0x023F */
00513 /* 0x0240  0x027F PIM (Port Integration Module PIM_9DP256) */
00514 #define PTT (*(volatile unsigned char *)0x0240) /* PTT7 PTT6    PTT5    PTT4    PTT3    PTT2    PTT1    PTT0 */
00515 #define PTIT    (*(volatile unsigned char *)0x0241) /* PTIT7    PTIT6   PTIT5   PTIT4   PTIT3   PTIT2   PTIT1   PTIT0 */
00516 #define DDRT    (*(volatile unsigned char *)0x0242) /* DDRT7    DDRT7   DDRT5   DDRT4   DDRT3   DDRT2   DDRT1   DDRT0 */
00517 #define RDRT    (*(volatile unsigned char *)0x0243) /* RDRT7    RDRT6   RDRT5   RDRT4   RDRT3   RDRT2   RDRT1   RDRT0 */
00518 #define PERT    (*(volatile unsigned char *)0x0244) /* PERT7    PERT6   PERT5   PERT4   PERT3   PERT2   PERT1   PERT0 */
00519 #define PPST    (*(volatile unsigned char *)0x0245) /* PPST7    PPST6   PPST5   PPST4   PPST3   PPST2   PPST1   PPST0 */
00520 /* Reserved: 0x0246. */
00521 /* Reserved: 0x0247. */
00522 #define PTS (*(volatile unsigned char *)0x0248) /* PTS7 PTS6    PTS5    PTS4    PTS3    PTS2    PTS1    PTS0 */
00523 #define PTIS    (*(volatile unsigned char *)0x0249) /* PTIS7    PTIS6   PTIS5   PTIS4   PTIS3   PTIS2   PTIS1   PTIS0 */
00524 #define DDRS    (*(volatile unsigned char *)0x024A) /* DDRS7    DDRS7   DDRS5   DDRS4   DDRS3   DDRS2   DDRS1   DDRS0 */
00525 #define RDRS    (*(volatile unsigned char *)0x024B) /* RDRS7    RDRS6   RDRS5   RDRS4   RDRS3   RDRS2   RDRS1   RDRS0 */
00526 #define PERS    (*(volatile unsigned char *)0x024C) /* PERS7    PERS6   PERS5   PERS4   PERS3   PERS2   PERS1   PERS0 */
00527 #define PPSS    (*(volatile unsigned char *)0x024D) /* PPSS7    PPSS6   PPSS5   PPSS4   PPSS3   PPSS2   PPSS1   PPSS0 */
00528 /* 0x0200  0x023F CAN3 (Motorola Scalable CAN  MSCAN) */
00529 #define WOMS    (*(volatile unsigned char *)0x024E) /* WOMS7    WOMS6   WOMS5   WOMS4   WOMS3   WOMS2   WOMS1   WOMS0 */
00530 /* Reserved: 0x024F. */
00531 #define PTM (*(volatile unsigned char *)0x0250) /* PTM7 PTM6    PTM5    PTM4    PTM3    PTM2    PTM1    PTM0 */
00532 #define PTIM    (*(volatile unsigned char *)0x0251) /* PTIM7    PTIM6   PTIM5   PTIM4   PTIM3   PTIM2   PTIM1   PTIM0 */
00533 #define DDRM    (*(volatile unsigned char *)0x0252) /* DDRM7    DDRM7   DDRM5   DDRM4   DDRM3   DDRM2   DDRM1   DDRM0 */
00534 #define RDRM    (*(volatile unsigned char *)0x0253) /* RDRM7    RDRM6   RDRM5   RDRM4   RDRM3   RDRM2   RDRM1   RDRM0 */
00535 #define PERM    (*(volatile unsigned char *)0x0254) /* PERM7    PERM6   PERM5   PERM4   PERM3   PERM2   PERM1   PERM0 */
00536 #define PPSM    (*(volatile unsigned char *)0x0255) /* PPSM7    PPSM6   PPSM5   PPSM4   PPSM3   PPSM2   PPSM1   PPSM0 */
00537 #define WOMM    (*(volatile unsigned char *)0x0256) /* WOMM7    WOMM6   WOMM5   WOMM4   WOMM3   WOMM2   WOMM1   WOMM0 */
00538 #define MODRR   (*(volatile unsigned char *)0x0257) /* 0    MODRR6  MODRR5  MODRR4  MODRR3  MODRR2  MODRR1  MODRR0 */
00539 #define PTP (*(volatile unsigned char *)0x0258) /* PTP7 PTP6    PTP5    PTP4    PTP3    PTP2    PTP1    PTP0 */
00540 #define PTIP    (*(volatile unsigned char *)0x0259) /* PTIP7    PTIP6   PTIP5   PTIP4   PTIP3   PTIP2   PTIP1   PTIP0 */
00541 #define DDRP    (*(volatile unsigned char *)0x025A) /* DDRP7    DDRP7   DDRP5   DDRP4   DDRP3   DDRP2   DDRP1   DDRP0 */
00542 #define RDRP    (*(volatile unsigned char *)0x025B) /* RDRP7    RDRP6   RDRP5   RDRP4   RDRP3   RDRP2   RDRP1   RDRP0 */
00543 #define PERP    (*(volatile unsigned char *)0x025C) /* PERP7    PERP6   PERP5   PERP4   PERP3   PERP2   PERP1   PERP0 */
00544 #define PPSP    (*(volatile unsigned char *)0x025D) /* PPSP7    PPSP6   PPSP5   PPSP4   PPSP3   PPSP2   PPSP1   PPSS0 */
00545 #define PIEP    (*(volatile unsigned char *)0x025E) /* PIEP7    PIEP6   PIEP5   PIEP4   PIEP3   PIEP2   PIEP1   PIEP0 */
00546 #define PIFP    (*(volatile unsigned char *)0x025F) /* PIFP7    PIFP6   PIFP5   PIFP4   PIFP3   PIFP2   PIFP1   PIFP0 */
00547 #define PTH (*(volatile unsigned char *)0x0260) /* PTH7 PTH6    PTH5    PTH4    PTH3    PTH2    PTH1    PTH0 */
00548 #define PTIH    (*(volatile unsigned char *)0x0261) /* PTIH7    PTIH6   PTIH5   PTIH4   PTIH3   PTIH2   PTIH1   PTIH0 */
00549 #define DDRH    (*(volatile unsigned char *)0x0262) /* DDRH7    DDRH7   DDRH5   DDRH4   DDRH3   DDRH2   DDRH1   DDRH0 */
00550 #define RDRH    (*(volatile unsigned char *)0x0263) /* RDRH7    RDRH6   RDRH5   RDRH4   RDRH3   RDRH2   RDRH1   RDRH0 */
00551 #define PERH    (*(volatile unsigned char *)0x0264) /* PERH7    PERH6   PERH5   PERH4   PERH3   PERH2   PERH1   PERH0 */
00552 #define PPSH    (*(volatile unsigned char *)0x0265) /* PPSH7    PPSH6   PPSH5   PPSH4   PPSH3   PPSH2   PPSH1   PPSH0 */
00553 #define PIEH    (*(volatile unsigned char *)0x0266) /* PIEH7    PIEH6   PIEH5   PIEH4   PIEH3   PIEH2   PIEH1   PIEH0 */
00554 /* 0x0240  0x027F PIM (Port Integration Module PIM_9DP256) */
00555 #define PIFH    (*(volatile unsigned char *)0x0267) /* PIFH7    PIFH6   PIFH5   PIFH4   PIFH3   PIFH2   PIFH1   PIFH0 */
00556 #define PTJ     (*(volatile unsigned char *)0x0268) /* PTJ7 PTJ6    0   0   0   0   PTJ1    PTJ0 */
00557 #define PTIJ    (*(volatile unsigned char *)0x0269) /* PTIJ7    PTIJ6   0   0   0   0   PTIJ1   PTIJ0 */
00558 #define DDRJ    (*(volatile unsigned char *)0x026A) /* DDRJ7    DDRJ7   0   0   0   0   DDRJ1   DDRJ0 */
00559 #define RDRJ    (*(volatile unsigned char *)0x026B) /* RDRJ7    RDRJ6   0   0   0   0   RDRJ1   RDRJ0 */
00560 #define PERJ    (*(volatile unsigned char *)0x026C) /* PERJ7    PERJ6   0   0   0   0   PERJ1   PERJ0 */
00561 #define PPSJ    (*(volatile unsigned char *)0x026D) /* PPSJ7    PPSJ6   0   0   0   0   PPSJ1   PPSJ0 */
00562 #define PIEJ    (*(volatile unsigned char *)0x026E) /* PIEJ7    PIEJ6   0   0   0   0   PIEJ1   PIEJ0 */
00563 #define PIFJ    (*(volatile unsigned char *)0x026F) /* PIFJ7    PIFJ6   0   0   0   0   PIFJ1   PIFJ0 */
00564 /* Reserved: 0x0270 - 0x027F. */
00565 /* 0x0280  0x02BF CAN4 (Motorola Scalable CAN  MSCAN) */
00566 #define CAN4CTL0    (*(volatile unsigned char *)0x0280) /* RXFRM    RXACT   CSWAI   SYNCH   TIME    WUPE    SLPRQ   INITRQ */
00567 #define CAN4CTL1    (*(volatile unsigned char *)0x0281) /* CANE CLKSRC  LOOPB   LISTEN  0   WUPM    SLPAK   INITAK */
00568 #define CAN4BTR0    (*(volatile unsigned char *)0x0282) /* SJW1 SJW0    BRP5    BRP4    BRP3    BRP2    BRP1    BRP0 */
00569 #define CAN4BTR1    (*(volatile unsigned char *)0x0283) /* SAMP TSEG22  TSEG21  TSEG20  TSEG13  TSEG12  TSEG11  TSEG10 */
00570 #define CAN4RFLG    (*(volatile unsigned char *)0x0284) /* WUPIF    CSCIF   RSTAT1  RSTAT0  TSTAT1  TSTAT0  OVRIF   RXF */
00571 #define CAN4RIER    (*(volatile unsigned char *)0x0285) /* WUPIE    CSCIE   RSTATE1 RSTATE0 TSTATE1 TSTATE0 OVRIE   RXFIE */
00572 #define CAN4TFLG    (*(volatile unsigned char *)0x0286) /* 0    0   0   0   0   TXE2    TXE1    TXE0 */
00573 #define CAN4TIER    (*(volatile unsigned char *)0x0287) /* 0    0   0   0   0   TXEIE2  TXEIE1  TXEIE0 */
00574 #define CAN4TARQ    (*(volatile unsigned char *)0x0288) /* 0    0   0   0   0   ABTRQ2  ABTRQ1  ABTRQ0 */
00575 #define CAN4TAAK    (*(volatile unsigned char *)0x0289) /* 0    0   0   0   0   ABTAK2  ABTAK1  ABTAK0 */
00576 #define CAN4TBSEL   (*(volatile unsigned char *)0x028A) /* 0    0   0   0   0   TX2 TX1 TX0 */
00577 #define CAN4IDAC    (*(volatile unsigned char *)0x028B) /* 0    0   IDAM1   IDAM0   0   IDHIT2  IDHIT1  IDHIT0 */
00578 /* Reserved: 0x028C. */
00579 /* 0x0240  0x027F PIM (Port Integration Module PIM_9DP256) */
00580 /* Reserved: 0x028D. */
00581 #define CAN4RXERR   (*(volatile unsigned char *)0x028E) /* RXERR7   RXERR6  RXERR5  RXERR4  RXERR3  RXERR2  RXERR1  RXERR0 */
00582 #define CAN4TXERR   (*(volatile unsigned char *)0x028F) /* TXERR7   TXERR6  TXERR5  TXERR4  TXERR3  TXERR2  TXERR1  TXERR0 */
00583 #define CAN4IDAR0   (*(volatile unsigned char *)0x0290) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00584 #define CAN4IDAR1   (*(volatile unsigned char *)0x0291) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00585 #define CAN4IDAR2   (*(volatile unsigned char *)0x0292) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00586 #define CAN4IDAR3   (*(volatile unsigned char *)0x0293) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00587 #define CAN4IDMR0   (*(volatile unsigned char *)0x0294) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00588 #define CAN4IDMR1   (*(volatile unsigned char *)0x0295) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00589 #define CAN4IDMR2   (*(volatile unsigned char *)0x0296) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00590 #define CAN4IDMR3   (*(volatile unsigned char *)0x0297) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00591 #define CAN4IDAR4   (*(volatile unsigned char *)0x0298) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00592 #define CAN4IDAR5   (*(volatile unsigned char *)0x0299) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00593 #define CAN4IDAR6   (*(volatile unsigned char *)0x029A) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00594 #define CAN4IDAR7   (*(volatile unsigned char *)0x029B) /* AC7  AC6 AC5 AC4 AC3 AC2 AC1 AC0 */
00595 #define CAN4IDMR4   (*(volatile unsigned char *)0x029C) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00596 #define CAN4IDMR5   (*(volatile unsigned char *)0x029D) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00597 #define CAN4IDMR6   (*(volatile unsigned char *)0x029E) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00598 #define CAN4IDMR7   (*(volatile unsigned char *)0x029F) /* AM7  AM6 AM5 AM4 AM3 AM2 AM1 AM0 */
00599 #define CAN4RXFG    (*(volatile unsigned char *)0x02A0) /* FOREGROUND   RECEIVE BUFFER  see Table 12 */
00600                         /* ...  0x02AF */
00601 #define CAN4TXFG    (*(volatile unsigned char *)0x02B0) /* FOREGROUND   TRANSMIT    BUFFER  see Table 12 */
00602                         /* ...  0x02BF */
00603 /* Reserved space: 0x02C0  0x03FF. */
00604 /* 0x0280  0x02BF CAN4 (Motorola Scalable CAN  MSCAN) */

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